Siemens Launches Automated Analog Circuit Test Solution

Siemens Digital Industries Software has announced the release of Tessent AnalogTest, a groundbreaking software solution designed to automate and accelerate the testing of analog circuitry in integrated circuits (ICs). This marks the industry’s first automated design-for-test (DFT) tool tailored specifically for analog blocks — an area traditionally dominated by manual processes and expensive mixed-signal test equipment.

According to Siemens, Tessent AnalogTest can reduce test pattern generation time from months to just a few days, dramatically improving efficiency and reducing both development and test costs. The software enables up to 100x faster test execution and integrates seamlessly with Tessent DefectSim, allowing verification of analog defect coverage in simulation environments at speeds up to 1000x faster than conventional specification-based testing.

From Manual Complexity to Automated Efficiency

Analog testing has long been a labor-intensive and costly segment of IC development. Engineers typically rely on custom coding, lengthy validation, and expensive testers to ensure performance and reliability. Tessent AnalogTest changes that by automatically generating minimal-impact DFT circuitry and digital test patterns for almost any analog block. These patterns run in under a millisecond on standard digital automated test equipment (ATE), significantly reducing dependency on complex mixed-signal testers.

The solution also allows users to compute test coverage before tape-out, helping teams meet stringent quality requirements and speed up time-to-market.

“Tessent AnalogTest software represents a monumental leap forward in addressing key quality and cost challenges associated with analog circuit testing,” said Ankur Gupta, SVP and GM of Siemens’ Digital Design Creation Platform. “It enables our customers to streamline processes while achieving higher defect coverage, faster test times, and reduced costs.”

Early Results and Industry Adoption

One of the early adopters, onsemi, implemented Tessent AnalogTest in a taped-out design and reported greater than 95% analog defect coverage and over 100x improvement in test time compared to traditional methods.

“The biggest challenge in achieving DPPB-level quality in analog and mixed-signal products is the lack of structured DFT and test generation methodologies,” said Steven Gray, SVP of New Product Development at onsemi. “Tessent AnalogTest changes that by automatically generating analog DFT solutions and associated tests. We’re optimistic this will lead to shorter development cycles, faster testing, and significantly better product quality.”

Standards-Based and Scalable

Tessent AnalogTest also aligns with industry standards, supporting IEEE P2427 for analog defect coverage and IEEE P1687.2, the analog extension of the IJTAG standard. It can generate simulation testbenches from specification-based tests using ICL and PDL test descriptions. This supports advanced requirements such as algorithmic trimming, parametric top-up testing, and ISO 26262 functional safety metrics.

The tool can also integrate embedded scan tests to further enhance safety and quality assurance.